Omega Speaker Systems PCI-DAS1001 User Manual

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Summary of Contents

Page 1 - User's Guide

User's Guidehttp://www.omega.come-mail: [email protected]

Page 2 - Table of Contents

4.1.2 System Grounds and IsolationThere are three scenarios possible when connecting your signal source to your PCI-DAS1000 board. 1. The PCI-DAS1000

Page 3

WARNINGIf either the AC or DC voltage is greater than 10 volts, do not connect the PCI-DAS1000 to this signalsource. You are beyond the boards usable

Page 4 - 1.0 INTRODUCTION

Relying on the earth prong of a 120VAC for signal ground connections is not advised.. Differentground plugs may have large and potentially even danger

Page 5 - 2.0 INSTALLATION

4.2.1 Common Ground / Single-Ended InputsSingle-ended is the recommended configuration for common ground connections. However, if some of your inputs

Page 6 - 2.4 DOS and/or WINDOWS 3.1

4.2.4 Common Mode Voltage < +/-10V / Differential InputsSystems with varying ground potentials should always be monitored in the differential mode.

Page 7 - 3.0 HARDWARE CONNECTIONS

4.2.6 Isolated Grounds / Single-Ended InputsSingle-ended inputs can be used to monitor isolated inputs, though the use of the differential mode will i

Page 8 - 4.0 ANALOG CONNECTIONS

13+-InputAmpTo A /DA/D BoardI/OConnectorLL GNDCH HighCH LowSignal Source and A/D Board Already Isolated.Already isolated s

Page 9 - Differential

5.0 PROGRAMMING & SOFTWARE APPLICATIONS Your PCI-DAS1000 is supported by the powerful Universal Library. We strongly recommend that you take

Page 10

6.0 SELF-CALIBRATION OF THE PCI-DAS1000 The PCI-DAS1000 is shipped fully-calibrated from the factory with cal coefficients stored in nvRAM. At r

Page 11

6.1.2 Analog OutputsThe calibration scheme for the Analog Out section is shown in Figure 2 below. This circuit is duplicated for both DAC0and DAC1Fig

Page 12 - 4.2 WIRING CONFIGURATIONS

166.1.2 ANALOG OUTPUTS ...156.1.1 ANALOG INPUTS ...15 6.1 CALIBRATION

Page 13 - A/D Board

7.0 PCI-DAS1000 REGISTER DESCRIPTION 7.1 REGISTER OVERVIEWPCI-DAS1000 operation registers are mapped into I/O address space. Unlike ISA bus desi

Page 14

INT[1:0]General Interrupt Source selection bits.AD FIFO Not Empty11AD FIFO Half Full01End of Channel Scan10Not Defined 00SourceINT0 INT1INTE Enable

Page 15

ADHFIStatus bit of ADC FIFO Half-Full interrupt. Used during REP INSW operations.1 = Indicates an ADC Half-Full interrupt has been latched. FIFO has

Page 16

The following tables summarizes all possible Offset/Range configurations:PCI-DAS1002305 uV80-1.25V111610 uV40-2.5V0111.22 mV20-5V1012.44 mV10-10V00161

Page 17 - 5.1 PROGRAMMING LANGUAGES

7.3.3 TRIGGER CONTROL/STATUS REGISTERBADR1 + 4This register provides control bits for all ADC trigger modes. A Read/Write register.WRITETS0TS1--TGEN

Page 18 - Variable Gain

The table below provides a summary of bit settings and operation.XTRIG # Samples <1/2 FIFO,Pre-Trigger ModeVia SW immediately11ADHF # Samples >1

Page 19 - Analog Out

7.3.4 CALIBRATION REGISTERSee "Calibrating The PCI-DAS1000" document for additional programming details. BADR1 + 6This register controls al

Page 20

7.3.5 DAC CONTROL/STATUS REGISTERBADR1 + 8 This register selects the DAC gain/range and update modes. This is a Write-only register.WRITE-DACEN-----M

Page 21

7.4 BADR2The I/O Region defined by BADR2 contains the ADC Data register and the ADC FIFO clearregister.7.4.1 ADC DATA REGISTERBADR2 + 0 ADC Data regis

Page 22 - A Read/Write register

7.5 BADR3The I/O Region defined by BADR3 contains data and control registers for the ADC Pacer, Pre/Post-Trigger Counters, UserCounters and Digital I/

Page 23 - --------------EOC

34 8.5 OTHER SPECIFICATIONS ...34 8.4 COUNTER SECTION ...33 8.3

Page 24

8254A COUNTER 2 DATA - ADC PACER DIVIDER UPPERBADR3 + 2READ/WRITED0D1D2D3D4D5D6D701324567Counter 1 provides the lower 16 bits of the 32-bit pacer clo

Page 25 - -------XTRIG----INDX_GT

DIO PORT C DATABADR3 + 6PORT C may be configured as an 8-bit port of either input or output, or it may be split into two independent 4-bit ports ofin

Page 26 -

7.5.3 INDEX and USER COUNTER 4 DATA AND CONTROL REGISTERS 8254B COUNTER 0 DATA - ADC PRE-TRIGGER INDEX COUNTER(or user counter 4)BADR3 + 8READ/WRITED

Page 27

8254B CONTROL REGISTER BADR3 + BhWRITE ONLYD0D1D2D3D4D5D6D701324567The control register is used to set the operating Modes of 8254B Counters 0,1 &

Page 28 - 000 h = -FS

7.6 BADR4The I/O Region defined by BADR4 contains the DAC0 and DAC1 data registers.7.6.1 DAC0 DATA REGISTERBADR4 + 0 WRITEDAC0(0)DAC0(1)DAC0(2)DAC0(3)

Page 29

8.0 ELECTRICAL SPECIFICATIONS (Typical specifications for 25 DegC unless otherwise specified.)8.1 ANALOG INPUT SECTIONA/D converter type 7800Resol

Page 30

8.2 ANALOG OUTPUTD/A type AD7847ARResolution 12 bitsNumber of channels 2Output Ranges ±10V, ±5V, 0-5V, 0-10V. Each channel independently programmable

Page 31 - BADR3 + 7

8.4 COUNTER SECTIONCounter type 82C54Configuration Two 82C54 devices. 3 down counters per 82C54, 16 bits each82C54A:Counter 0 - ADC residual sample co

Page 32

EC Declaration of ConformityDescriptionPart NumberHigh speed analog I/O board for the PCI busPCI-DAS1000to which this declaration relates, meets the e

Page 34

1.0 INTRODUCTION The PCI-DAS1002 and PCI-DAS1001 are multifunction analog and digital I/O boards designed to operate in computerswith PCI bus acc

Page 35 - 8.0 ELECTRICAL SPECIFICATIONS

2.0 INSTALLATION 2.1 HARDWARE INSTALLATIONThe PCI-DAS1001 and PCI-DAS1002 products are completely plug and play. Simply follow the steps shown bel

Page 36 - 8.2 ANALOG OUTPUT

2.3 RUN InstaCalRun the InstaCal program in order to test your board and configure it for run-time use. By configuring the board, you addinformation

Page 37 - 8.5 OTHER SPECIFICATIONS

3.0 HARDWARE CONNECTIONS 3.1 CONNECTOR PIN DIAGRAMThe PCI-DAS1000 series employ a 100 pin I/O connector. Please make accurate notes and pay car

Page 38 - EC Declaration of Conformity

4.0 ANALOG CONNECTIONS 4.1 ANALOG INPUTSAnalog signal connection is one of the most challenging aspects of applying a data acquisition board. If

Page 39

Differential InputsDifferential inputs measure the voltage between two distinct input signals. Within a certain range (referred to as the commonmode r

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