Omega Speaker Systems PCI-DAS1001 User Manual download pdf (Page 25)

The table below provides a summary of bit settings and operation.

XTRIG

# Samples <1/2 FIFO,

Pre-Trigger Mode

Via SW immediately

ADHF

# Samples >1 FIFO

Pre-Trigger Mode

----------------------------------

1/2 FIFO < # Samples < 1 FIFO

Pre-Trigger Mode

Via SW when

remaining count <1024

------------------------

Via SW immediately

ADC Pacer

# Samples <1/2 FIFO

Normal Mode

Via SW immediately

ADHF

# Samples >1 FIFO

Normal Mode

----------------------------------

1/2 FIFO < # Samples < 1 FIFO

Normal Mode

Via SW when

remaining count <1024

------------------------

Via SW immediately

Sample CTR

Starts on...

FIFO ModeARM is set...FFM0PRTRG

C0SRC

This bit allows the user to select the clock source for user Counter 0.

1 = Internal 10MHz oscillator

0 = External clock source input via CTR0CLK pin on 100p connector.

READ

-------XTRIG----INDX_GT---

0123456789101112131415

XTRIG

1 = External Trigger flip-flop has been set. This bit is write-cleared.

0 = External Trigger flip-flop reset. No trigger has been received.

INDX_GT

1 = Pre-trigger index counter has completed its count.

0 = Pre-trigger index counter has not been gated on or has not yet completed its count

1 2 ... 20 21 22 23 24 25 26 27 28 29 30 ... 38 39

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Omega Speaker Systems PCI-DAS1001 User Manual Page 25

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